1. Field
The present invention relates generally to wireless communications, and more specifically to efficient deinterleaving of multiple symbol streams.
2. Background
Wireless communication systems are widely deployed to provide various types of communication such as voice and data. A typical wireless data system, or network, provides multiple users access to one or more shared resources. A system may use a variety of multiple access techniques such as Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM), Code Division Multiplexing (CDM), and others.
Example wireless networks include cellular-based data systems. The following are several such examples: (1) the “TIA/EIA-95-B Mobile Station-Base Station Compatibility Standard for Dual-Mode Wideband Spread Spectrum Cellular System” (the IS-95 standard), (2) the standard offered by a consortium named “3rd Generation Partnership Project” (3GPP) and embodied in a set of documents including Document Nos. 3G TS 25.211, 3G TS 25.212, 3G TS 25.213, and 3G TS 25.214 (the W-CDMA standard), (3) the standard offered by a consortium named “3rd Generation Partnership Project 2” (3GPP2) and embodied in “TR-45.5 Physical Layer Standard for cdma2000 Spread Spectrum Systems” (the IS-2000 standard), and (4) the high data rate (HDR) system that conforms to the TIA/EIA/IS-856 standard (the IS-856 standard).
As data rates supported by wireless communication systems have continued to increase, the computation requirement has increased accordingly. For example, to increase data rate, a higher order modulation may be used as well as an increase in coding gain. This computation may require increased clock frequency at the mobile station or a more efficient architecture to reduce the computation requirements while achieving the same system performance. For example, the HDR Release A standard targets a data rate of 3.1 Mbps. Support of this data rate requires 50 percent more computation complexity to achieve similar performance achieved with the previous highest HDR data rate of 2.4 Mbps.
One solution to increase computation is to increase the operating frequency of the circuit. However, an increase in frequency translates into higher power consumption, which is undesirable in many instances, such as a battery-powered mobile station. Furthermore, some circuits have limitations preventing them from operating reliably outside of certain clock frequencies.
In a system such as the IS-856 standard, the turbo decoder may be the single most computationally intensive block. The amount of time allowed for deinterleaving and decoding in an HDR system must be less than the HDR slot time, i.e. 1.66 ms, to satisfy the acknowledgement requirement. In order to meet this requirement while also keeping the clock rate at an acceptable level to conserve power, the number of computations for deinterleaving and decoding must be reduced.
It is generally desirable to deliver symbols in sequential order to a decoder, such as a turbo decoder. In a prior art implementation, to simplify the delivery of the demodulated symbols to the decoder, a symbol may be demodulated more than once. A symbol demodulation may yield more than one demodulated symbol per cycle (i.e. 4 demodulated symbols from one 16 QAM symbol). Thus, multiple symbol streams are generated simultaneously. One result of each demodulation is stored in a memory at a time. Using a single memory and storing the demodulated symbols in sequential order may have provided a simplified design and/or data interface configuration, but at high data rates, such an architecture may not provide the bandwidth required for the decoding computation with a reasonable clock frequency. There is therefore a need in the art for an efficient multi-symbol deinterleaver.